Xilinx ISE Design Suite v12 4 LINUX
XilinxISEDesignSuitev124LINUX英文正式版(賽靈思ISE?12設計套件FPGA/DSP和嵌入式處理系統軟體)(DVD版)
破解說明:
installandselectSystemEdition.Check/SPYRAL
內容說明:
2010年5月4日，中國北京——全球可編程平台領導廠商賽靈思公司（Xilinx,Inc.
(NASDAQ:XLNX)）日前推出ISE?12軟體設計套件，實現了具有更高設計生產力的功耗和
成本的突破性優化。ISE設計套件首次利用「智慧」時鐘門控技術，將動態功耗降低多達
30%。此外，該新型套件還提供了基於時序的高級設計保存功能、為即插即用設計提供符合
AMBA4AXI4規範的IP支援，同時具備第四代部分重配置功能的直觀設計流程，可降低
多種高性能應用的系統成本。
英文說明:
XilinxintroducedtheISE?DesignSuite12softwaretoenable
breakthroughoptimizationsforpowerandcostwithgreaterdesign
productivity.Forthefirsttime,ISEdesigntoolsdeliver'intelligent'
clock-gatingtechnologythatreducesdynamicpowerconsumptionbyas
muchas30percent.Thenewsuitealsoprovidesadvancesin
timing-drivendesignpreservation,AMBA4AXI4-complaintIPsupportfor
plug-and-playdesign,andanintuitivedesignflowwith
fourth-generationpartialreconfigurationcapabilitiesthatlowers
systemcostforabroadrangeofhighperformanceapplications.

WithfullproductionsupportforallXilinx?Virtex?6andSpartan?6
FPGAfamilies,theISE12releasecontinuesitsevolutionasthe
industry'sonlydomain-specificdesignsuitewithinteroperabledesign
flowsandtoolconfigurationsforlogic,digitalsignalprocessing
(DSP),embeddedprocessing,andsystem-leveldesign.Inaddition,Xilinx
incorporatedanumberofsoftwareinfrastructureandmethodology
enhancementsthatimproveruntime,streamlinesystemintegration,and
expandIPinteroperabilityacrossitslatestgenerationdevicefamilies
andTargetedDesignPlatforms.

IntelligentAutomationforPowerOptimization

ISEDesignSuite12introducestheFPGAindustry'sfirstintelligent
clock-gatingtechnologywithfullyautomatedanalysisandfine-grain
(logicslice)optimizationcapabilitiesspecificallydevelopedtoreduce
thenumberoftransitions,aprimarycontributingfactorofdynamic
powerdissipationindigitaldesigns.Thetechnologyworksbyanalyzing
designsusingaseriesofuniquealgorithmstodetectsequential
elements...
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